IIT Jammu Recruitment 2025 – Junior Research Fellow (JRF) Position
The Indian Institute of Technology Jammu (IIT Jammu) was established in 2016 following an MoU between the Department of Higher Education, Government of Jammu & Kashmir, and the Ministry of Higher Education, Government of India. Located along NH-44 at Jagti, Nagrota, the permanent campus combines modern infrastructure with a strong commitment to research, innovation and quality education. Since its inception, IIT Jammu has steadily grown into a vibrant academic and research institution and continues to develop world-class laboratories and project facilities.
Position Overview
IIT Jammu invites online applications from eligible candidates for the position of Junior Research Fellow (JRF) under a sponsored research project in the Department of Electrical Engineering.
Project Title
“Towards Trusted-node Free Hybrid Quantum Secure Communication Network (TAHQEECAT)”
The project involves advanced research in secure communication, quantum key distribution systems and high-performance hardware architectures.
Areas of Research / Specialization
The selected JRF will work in one or more of the following domains:
- Hardware-Friendly Algorithm Design
- Digital VLSI Architecture Design
- FPGA-Based System Design
- ASIC Chip Design and Tape-out
- Digital Signal Processing
- Cryptography
- Post-Processing and Signal Processing for Quantum Key Distribution
Vacancy Details
| Particulars | Details |
|---|---|
| Post Name | Junior Research Fellow (JRF) |
| Project | TAHQEECAT |
| Employment Type | Temporary / Project-based |
| Duration | Initially one year (extendable based on performance) |
| Location | IIT Jammu, Jammu & Kashmir |
| Salary | ₹37,000 per month + 18% HRA |
| Apply Mode | Online |
Eligibility Criteria
Educational Qualification
Option 1: Postgraduate Degree Route
- M.E. / M.Tech. / MS(R) in
- CSE
- ECE
- EE
- Microelectronics
- VLSI Design
- Allied fields
- Minimum 65% marks or equivalent CGPA
- 5% relaxation for SC/ST/PwD candidates
- Students awaiting final results may also apply
Option 2: Undergraduate Route
- B.E. / B.Tech. / M.Sc. in
- CSE
- ECE
- EE
- Electronics
- Microelectronics
- VLSI Design
- Embedded Systems
- Allied fields
- Minimum 65% marks or equivalent
Additional Requirements
- Candidates must qualify any one of the following national examinations:
- CSIR-UGC NET
- NET (Assistant Professorship)
- GATE
- National-level exams conducted by DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IITs, IISc, IISER, NISER etc.
Relaxation:
Candidates who graduated from Centrally Funded Technical Institutes (CFTIs) with CGPA > 8.0 are exempted from NET/GATE.
Preferred Skills
Candidates with the following expertise will receive preference:
- Cryptography
- Digital Signal Processing
- Digital VLSI Architecture
- FPGA System Design
- Verilog / VHDL
- EDA tools (Cadence, Synopsys etc.)
Job Responsibilities
The JRF will be responsible for:
- Designing and testing digital architectures
- Developing FPGA-based systems and ASIC modules
- Contributing to signal processing components in QKD systems
- Collaborating with faculty and research teams
- Preparing project reports and documentation
How to Apply
Eligible candidates must submit their applications online using the IIT Jammu recruitment portal.
Application Portal
https://apply.iitjammu.ac.in/#/home
Applicants must select the option:
“Contract/Project Staff → JRF/SRF”
Required Documents
- Duly filled application form
- Updated CV
- Academic certificates and mark sheets
- Proof of category (if applicable)
- GATE/NET or national exam scorecard (if applicable)
- Experience certificates (if any)
Incomplete applications may be rejected.
Important Dates
| Activity | Date |
|---|---|
| Last Date to Apply | 30 November 2025 |
| Expected Duration | One year (extendable) |
Address for Correspondence
Indian Institute of Technology Jammu
Jagti, NH-44, Nagrota Bypass
Jammu – 181221
Website: www.iitjammu.ac.in
The Junior Research Fellow position at IIT Jammu offers an excellent opportunity for candidates interested in advanced quantum communication systems, digital VLSI design and secure hardware architectures. With access to state-of-the-art labs and expert mentors, the position supports professional growth in high-impact research. Eligible candidates are encouraged to submit their online applications before 30 November 2025.
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